Spinning the Fabrication of Transistors with Nanocrystal Inks - By : Luis Felipe Gerlein Reyes,

Spinning the Fabrication of Transistors with Nanocrystal Inks

Luis Felipe Gerlein Reyes
Luis Felipe Gerlein Reyes Author profile
Luis Felipe Gerlein R. is a Ph.D. candidate at ÉTS. His research interests include nanofabrication and characterization of optoelectronic devices based on lead chalcogenides, carbon-based nanostructures and perovskite materials.

The traditional fabrication process to make a Field Effect Transistor (FET) starts from a single crystal semiconductor wafer that is then subject to a number of steps involving cleaning, implantation of dopants, photolithography, etching and thermal treatments at high temperatures.


Figure 1. Schematic of a traditional n-type Field Effect Transistor. The oxide is an insulating layer that helps control the conductivity of the channel (blue area) between the source and the drain (in red) by applying a voltage to gate.

Currently, these series of steps are well developed and the cost of fabrication is but a fraction of what it was 50 years ago despite the elevated value of the necessary equipment. The natural evolution of electronics points to its inclusion in more aspects of our daily lives and not only to a handful of devices.  Many potential applications depend on how much we can develop printing electronics in flexible substrates that can be included in clothes and uneven surfaces.

This tendency helped boosting new kind of non-silicon based electronics.  Among the most developed are organic and colloidal electronics.  In particular, colloidal electronics aims to use nanoscale semiconductors suspended in solution to make devices that can be constructed without the expensive equipment and processing facilities required in traditional electronics.

Indeed, there are a myriad of colloidal materials that meet the conditions of a conductor, semiconductor or insulators.  The research team lead by Drs. Cherie Kagan from the University of Pennsylvania and Ji-Hyuk Choi, a former student in Kagan’s group and now a senior Researcher at the Korea Institute of Geoscience and Mineral Resources, introduced a new approach to fabricate a fully colloidal-nanocrystal FET device using three simple and low cost techniques: spin-coating, dip-coating and photolithography.

processus fabrication transistor

Figure 2. Schematic of the fabrication process of the all-nanocrystal FET device.

Using a set of colloidal materials, each with a specific purpose within the final device, the team built a FET composed of: Silver (Ag) nanocrystals dispersed in octane is used to create the gate terminal of the transistor. Aluminum oxide (Al2O3) nanocrystals suspended in water are used as the insulating layer.  The channel is made of nanoparticles of Cadmium Selenide (CdSe) suspended in octane.  Finally, the source and drain terminals are a mixture of Indium/Silver (In/Ag) nanocrystals dispersed in octane.

Each layer is deposited atop each other by spin coating.  Chemical treatment to each layer is required to ensure that it will remain unaffected by the deposition of the following layers.  This is done using dip-coating or spin-coating the appropriate chemical.  Additionally, a mild-heating step triggered the migration of the Indium nanocrystals in the CdSe channel layer, doping it and affecting its conducting properties.  Photolithography was used to make the patterns of the gate and the drain/source terminals.  The fabrication process is depicted in Figure 2.

Each of the materials used in this fabrication process can be seen as an ink: A suspension of a solid material in another liquid material.  In comparison, the ink from a printer is nothing more than “fine pigment particles dispersed in a solvent”.  This novel approach is the first to successfully combine several nanocrystal inks into a functional device.  “This is the first work,” Choi said, “showing that all the components, the metallic, insulating, and semiconducting layers of the transistors, and even the doping of the semiconductor could be made from nanocrystals.”

encres nanocristaux

Figure 3. Nanocrystal Inks used in the fabrication of the FET device.

This approach brings us one step closer to print good performance electronics in flexible materials for applications in sensing, wearable medical devices, light harvesting and the internet of things.  This type of additive manufacturing process can be optimized for its inclusion in aerosol, inkjet, or 3D printing platforms. Such techniques are low cost and easily scalable for industrial production of printed electronics.

This study is available at, source.

[accordion title=”Quick explanation of the fabrication techniques” close=”1″]Spin Coating: The nanocrystal inks are deposited into a rotating substrate that will ensure its even dispersion all over the desired area. The faster/longer the spinning, the thinner the layer deposited. Depositions are usually made within 2000-4000 rpm but it can greatly vary depending on the characteristics of the solution.

Dip Coating: The substrate is dipped into the solution of interest. The removal speed is what gives the final thickness of the deposited layer. The faster the removal (mm/s) the thicker the layer. It strongly depends on the surface tension and viscosity of the solution.

Photolithography: This technique employs a photosensitive material (photo-resist or resist) that will be deposited on a substrate, typically by spin coating. The resist is then cured using either UV light, heat or both. The UV curing process includes a mask that allows only certain areas to be exposed to the light. These areas will remain or be gone (depending of the type of resist) leaving a pattern of cured resist similar to that of the mask. After depositing the desired layer material atop both, the substrate exposed and resist-covered areas will be covered.  By removing the cured resist, the material in close contact with it will be gone as well leaving a pattern of the material in the exposed substrate area.  This technique is also employed in the etching of semiconductors with specific patterns, among many other applications/variations.[/accordion]


Luis Felipe Gerlein Reyes

Author's profile

Luis Felipe Gerlein R. is a Ph.D. candidate at ÉTS. His research interests include nanofabrication and characterization of optoelectronic devices based on lead chalcogenides, carbon-based nanostructures and perovskite materials.

Program : Electrical Engineering 

Research chair : Canada Research Chair in Printed Hybrid Optoelectronic Materials and Devices 

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